View RFD16N06LESM_171945.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

RFD16N06LESM
Data Sheet September 2002
16A, 60V, 0.047 Ohm, Logic Level, N-Channel Power MOSFETs
These are N-Channel power MOSFETs manufactured using a modern process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and emitter switches for bipolar transistors. This performance is accomplished through a special gate oxide design which provides full rated conductance at gate bias in the 3V to 5V range, thereby facilitating true on-off power control directly from logic level (5V) integrated circuits. Formerly developmental type TA49027.
Features
* 16A, 60V * rDS(ON) = 0.047 * Temperature Compensating PSPICE(R) Model * Can be Driven Directly from CMOS, NMOS, TTL Circuits * Peak Current vs Pulse Width Curve * UIS Rating Curve * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Symbol
D
Ordering Information
PART NUMBER RFD16N06LESM* PACKAGE TO-252AA BRAND 16N06LE
G
NOTE: When ordering, use the entire part number. Add suffix 9A to obtain the TO-252AA variant in the tape and reel, i.e., RFD16N06LESM9A. *RFD16N06LESM is only availabe in tape and reel.
S
Packaging
JEDEC TO-252AA
DRAIN (FLANGE) GATE SOURCE
(c)2002 Fairchild Semiconductor Corporation
RFD16N06LESM Rev. B1
RFD16N06LESM
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified RFD16N06LESM 60 60 +10, -8 16 Refer to Peak Current Curve Refer to UIS Curve 90 0.606 -55 to 175 300 260 UNITS V V V A
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
W W/oC oC
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V, Figure 11 VGS = VDS, ID = 250A, Figure 10 VDS = 55V, VGS = 0V VDS = 50V, VGS = 0V, TC = 150oC MIN 60 1 VGS = 0V to 10V VGS = 0V to 5V VGS = 0V to 1V VDS = 25V, VGS = 0V, f = 1MHz Figure 12 VDD = 48V, ID = 16A, RL = 3 Figures 18, 19 TO-251AA, TO-252AA TYP 11 60 48 35 51 29 1.8 1350 300 90 MAX 3 1 250 10 0.047 100 115 62 35 2.6 1.65 80 UNITS V V A A A ns ns ns ns ns ns nC nC nC pF pF pF
oC/W oC/W
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 5V Threshold Gate Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
IGSS rDS(ON) tON td(ON) tr td(OFF) tf tOFF Qg(TOT) Qg(5) Qg(TH) CISS COSS CRSS RJC RJA
VGS = +10, -8V ID = 16A, VGS = 5V VDD = 30V, ID = 16A, RL = 1.88, VGS = 5V, RGS = 5 Figures 16, 17
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time NOTES: 2. Pulse Test: Pulse Width 300s, Duty Cycle 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. SYMBOL VSD trr ISD = 16A ISD = 16A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.5 125 UNITS V ns
(c)2002 Fairchild Semiconductor Corporation
RFD16N06LESM Rev. B1
RFD16N06LESM Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER
Unless Otherwise Specified
20
ID , DRAIN CURRENT (A)
1.0 0.8 0.6 0.4 0.2
15
10
5
0 0 25 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175
0 25
50
75
100
125
150
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
200 100 ID, DRAIN CURRENT (A)
IDM , PEAK CURRENT CAPABILITY (A)
TC = 25oC TJ = MAX RATED
500 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25
VGS = 10V 100 VGS = 5V
100s 10 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 1 VDSS MAX = 60V 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 100
(
175 - TC 150
)
10ms
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10 10-6 10-5 10-4 10-2 10-3 t, PULSE WIDTH (s) 10-1 100 101
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. PEAK CURRENT CAPABILITY
100 IAS , AVALANCHE CURRENT (A) STARTING TJ = 25oC ID , DRAIN CURRENT (A) STARTING TJ = 150oC
100 TC =25oC 80 VGS = 10V VGS = 5V VGS = 4.5V 60 VGS = 4V 40 VGS = 3V 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX. 0 10 0 1.5 3.0 4.5 6.0 7.5
10
If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 1 0.01 0.1 1 tAV, TIME IN AVALANCHE (ms)
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 5. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 6. SATURATION CHARACTERISTICS
(c)2002 Fairchild Semiconductor Corporation
RFD16N06LESM Rev. B1
RFD16N06LESM Typical Performance Curves
100 ID(ON) , ON STATE DRAIN CURRENT (A) VDD = 15V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -55oC 25oC 175oC NORMALIZED DRAIN TO SOURCE ON RESISTANCE
Unless Otherwise Specified (Continued)
2.5 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX. VGS = 5V, ID = 16A
80
2.0
60
1.5
40
1.0
20
0.5
0
0
1.5
3.0
4.5
6.0
7.5
0 -80
-40
0
40
80
120
160
200
VGS , GATE TO SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
2.0
VGS = VDS, ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
2.0
ID = 250A
NORMALIZED GATE THRESHOLD VOLTAGE
1.5
1.5
1.0
1.0
0.5
0.5
0 -80
-40
160 120 0 40 80 TJ , JUNCTION TEMPERATURE (oC)
200
0 -80
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED GATE THRESHOLD VOLTAGE vs TEMPERATURE
2000
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
60 VDD = BVDSS 45 VDD = BVDSS 3.75 5.00 VGS , GATE TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
1500
CISS
VDS , DRAIN TO SOURCE VOLTAGE (V)
1000
500
COSS CRSS
VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
30 0.75 BVDSS 0.75 BVDSS 0.50 BVDSS 0.50 BVDSS 0.25 BVDSS 0.25 BVDSS RL = 3.75 IG(REF) = 0.65mA VGS = 5V 0
2.50
15
1.25
0
0
0
5
10
15
20
25
VDS , DRAIN TO SOURCE VOLTAGE (V)
20 --------------------I G ( ACT )
I G ( REF )
t, TIME (s)
80 --------------------I G ( ACT )
I G ( REF )
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
(c)2002 Fairchild Semiconductor Corporation
RFD16N06LESM Rev. B1
RFD16N06LESM Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG tP
+
VDS VDD
IAS VDD
0V
IAS 0.01 0 tAV
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
VDS
tON td(ON)
tOFF td(OFF) tr tf 90%
VGS
RL
+
VDS
90%
DUT RGS
-
VDD 10% 90% 10%
VGS
VGS 10%
50% PULSE WIDTH
50%
FIGURE 15. SWITCHING TIME TEST CIRCUIT
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
VDS RL
VDD VDS
Qg(TOT)
VGS
Qg(10) OR Qg(5)
+
VGS = 20V VGS = 10V FOR L2 DEVICES VGS = 10V VGS = 5V FOR L2 DEVICES
VDD DUT Ig(REF)
VGS VGS = 2V 0 VGS = 1V FOR L2 DEVICES Qg(TH)
Ig(REF) 0
FIGURE 17. GATE CHARGE TEST CIRCUIT
FIGURE 18. GATE CHARGE WAVEFORMS
(c)2002 Fairchild Semiconductor Corporation
RFD16N06LESM Rev. B1
RFD16N06LESM PSPICE Electrical Model
SUBCKT RFD16N06LESM 2 1 3 ;
CA 12 8 1.46e-9 CB 15 14 1.46e-9 CIN 6 8 1.0e-9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD
10
rev 8/2/93
LDRAIN DPLCAP 5 RLDRAIN DBREAK 11 + EBREAK MWEAK MMED MSTRO CIN LSOURCE 8 RSOURCE RLSOURCE S1A 12 S1B CA 13 + EGS 6 8 EDS 13 8 S2A 14 13 S2B CB + 5 8 14 IT 15 17 RBREAK 18 RVTEMP 19 7 SOURCE 3 17 18 DBODY DRAIN 2 RSLC1 51 ESLC 50
RSLC2
5 51
ESG 6 8 + LGATE GATE 1 RLGATE EVTEMP RGATE + 18 22 9 20 EVTHRES + 19 8 6
IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 5.5e-9 LSOURCE 3 7 4.4e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 7.0e-3 RGATE 9 20 3.6 RLDRAIN 2 5 10 RLGATE 1 9 55 RLSOURCE 3 7 44 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 1.45e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*100),3.5))} .MODEL DBODYMOD D (IS = 6.3e-13 RS = 6.8e-3 TRS1 = 1e-3 TRS2 = 1e-6 XTI = 4.3 CJO = 1.28e-9 TT = 5.1e-8 M = 0.5) .MODEL DBREAKMOD D (RS = 2.9e-1 TRS1 = 1e-4 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 9.5e-10 IS = 1e-30 N = 10 M = 0.82) .MODEL MMEDMOD NMOS (VTO = 2.10 KP = 6 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6) .MODEL MSTROMOD NMOS (VTO = 2.45 KP = 60.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.79 KP = 0.13 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 36 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1.2e-3 TC2 = -5e-7) .MODEL RDRAINMOD RES (TC1 = 1.3e-2 TC2 = 3.1e-5) .MODEL RSLCMOD RES (TC1 = 5.5e-3 TC2 = 7e-6) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -1.8e-3 TC2 = -5.8e-6) .MODEL RVTEMPMOD RES (TC1 = -1.7e-3 TC2 = 8e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -4.8 VOFF= -2.8) VON = -2.8 VOFF= -4.8) VON = -0.6 VOFF= 0.5) VON = 0.5 VOFF= -0.6)
For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
(c)2002 Fairchild Semiconductor Corporation
+
-
EBREAK 11 7 17 18 66.0 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1
RDRAIN 21 16
-
VBAT +
8 22 RVTHRES
RFD16N06LESM Rev. B1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
FACTTM ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST(R) BottomlessTM FASTrTM CoolFETTM CROSSVOLTTM FRFETTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM EnSignaTM I2CTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER
ImpliedDisconnectTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM
PACMANTM POPTM Power247TM PowerTrench(R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER(R) SMART STARTTM
SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET(R) VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Preliminary
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I1

▲Up To Search▲

Price & Availability of RFD16N06LESM

	To Download RFD16N06LESM Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .